Demodulator for carrier transducers

ABSTRACT

A carrier type transducer is supplied with a carrier wave via an audio amplifier, a filter, a frequency divider and an oscillator. The carrier is modulated in accordance with the parameter being measured by the transducer and is fed to the input of a digital data system which may include a voltmeter. The output of the oscillator and the output of each stage of the divider are fed to an AND or a NAND gate and suitable variable and fixed delay circuits to the command input of the digital data system. With this arrangement, the digital data system is commanded to sample at the proper time so that the average voltage of the modulated carrier is measured and may be utilized with ancillary circuitry for control of the parameter being measured by the transducer.

United States Patent 1 Fletcher et al.

[ Mar.5, 1974 DEMODULATOR FOR CARRIER TRANSDUCERS [76] Inventors: JamesC. Fletcher, Administrator of the National Aeronautics and SpaceAdministration with respect to a invention of; Robert F. Roller,McMurray, Pa.

22 Filed: Nov.24,197l

21 Appl. No.: 201,700

[52] US. Cl 324/118, 324/102, 329/50 [51] Int. Cl. GOlr 19/22, GOlr27/28 [58] Field of Search 324/118, 102, 120, 99 D;

[56] References Cited UNITED STATES PATENTS 2,452,862 11/1948 Neff336/30 3,149,282 9/1964 Wasserman... 324/99 D 3,605,014 9/1971McCracken 1. 324/102 Primary ExaminerRudolph V. Rolinec AssistantExaminer-Emest F. Karlsen Attorney, Agent, or Firm-N T. Musial; J. A.Mackin;

John R. Manning [57] ABSTRACT A carrier type transducer is supplied witha carrier wave via an audio amplifier, a filter, a frequency divider andan oscillator. The carrier is modulated in accordance with the parameterbeing measured by the transducer and is fed to the input of a digitaldata system which may include a voltmeter. The output of the oscillatorand the output of each stage of the divider are fed to an AND or a NANDgate and suitable variable and fixed delay circuits to the command inputof the digital data system. With this arrangement, the digital datasystem is commanded to sample at the proper time so that the averagevoltage of the modulated carrier is measured and may be utilized withan- 3I21O,746 10/ 1965 PP 340/199 cillary circuitry for control of theparameter being 2,591,738 4/1952 Spencer 324/102 measured by thetransducer 2,624,770, l/l953 Yetter 324/l02 3,327,219 6/1967 Cunningham324/1 l8 9 Claims, 4 Drawing Figures E I9 20 loscILLAToRll DIVIDER l L T.i

l 330- E l S 33 SGALER I 1 l I 6. m I I 39 2e 21 i v VARIABLE APERATUREDIGITAL DELAY DELAY DATA SYSTEM 26 I L l PATENTED 74 sum 2 or z 5 N owSVN INVENTORS ROBERT F. ROLLER ATTORNEYS 1 DEMODULATOR FOR CARRIERTRANSDUCERS ORIGIN OF THE INVENTION BACKGROUND OF THE INVENTION Theinvention relates to demodulators and is directed more particularly to ademodulator utilizing digital techniques.

At the present time, it is a common practice to use for the measurementof pressure, displacement or acceleration, transducers which areenergized or excited by an AC carrier wave. Such devices are usuallylinear variable displacement transducers or variable reluctancetransducers which are excited by the AC signal. When other transducersare used in a radiation environment such as that emitted in the area ofa nuclear reactor excessive drift of the electrical output signalusually results. Improvements have been made in carrier-driventransducers, improving drift by reducing the DC component to zero.However, when an AC carrier signal is utilized, the resultant signal isa modulated waveform from which the desired signal must be extracted.This is accomplished by using a demodulator which rectifies and averagesthe modulated output signal of the transducer in phase with the inputstimulus to the transducer. Furthermore, before the demodulation occurs,the modulated signal must be brought into phase with the stimulus signalthus requiring phase shifting circuits which add complexity to thedemodulator in addition to being relatively expensive. The demodulationis generally accomplished using synchronous bridge demodulators whichare also expensive and complicated. Simple rectifier demodulatorsintroduce unacceptable non-linearities for low level signals.

SUMMARY OF THE INVENTION It is an object of the invention to provide anew and novel demodulator for carrier transducers.

It is another object of the invention to provide for a carrier typetransducer, a demodulator which is simple and inexpensive as compared tothose previously used.

Still another object of the invention is to provide for carriertransducers a demodulator utilizing digital circuitry and which isparticularly adaptable for use with digital type readout systems.

It is yet another object of the invention to provide a demodulatorsystem which can measure the average value or the instantaneous value ofa transducer output carrier signal at a predetermined time during anycycle of the carrier wave.

An additional object of the invention is to provide a demodulator whichextracts from a modulated carrier an analog of the stimulus ofa'transducer producing the modulated carrier without requiring themodulated carrier to be brought into phase with the carrier signalsupplied to the transducer.

DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a demodulatorembodying the invention;

FIG. 2 is a graph illustrating the phase relationship and wave-shapes ofsome of the more important electrical signals in the demodulator;

FIG. 3 is a graph illustrating the phase relationships and wave-formsencountered in unstimulated phasetype carrier transducers whendemodulated by conventional means; and

FIG. 4 is a graph illustrating the phase relationships and waveformsassociated with a statically-stimulated phase-type carrier transducerwhen demodulated by conventional means.

DESCRIPTION OF A PREFERRED EMBODIMENT Referring now to FIG. 1, it willbe seen that a demodulator embodying the invention includes generally asignal channel section 10 and a demodulator section 11 as defined by thedashed lines. An alternating current signal or carrier is supplied to acarrier transducer 12 such as a linear variable differential transformer(LVDT), the carrier being applied to a primary winding 13 of thetransducer 12. Movement of a core element 14 in response to a parametersuch as acceleration or fiuid pressure, for example, varies themagnitude of the carrier signal coupled to a pair of differentialwindings 15 and 16 such that a modulated carrier wave appears across aresistor 17 which develops the output signal from the differentialwindings l5 and 16. To extract the parametric signal from the carrierwave, demodulation circuitry must be provided.

The carrier signal is derived from an oscillator 19, the output signalof which is fed into a divider circuit 20. The output signal of thedivider is a square wave which is converted to sinusoidal form bydirecting it through a filter 21. The power of the sinusoidal outputvoltage of filter 21 is increased by feeding it through an audioamplifier 22 which is connected directly to the winding 13 of thetransducer 12.

The modulator carrier which appears across resistor 17 is directedthrough a sealer 25 to a signal input terminal 26 ofa digital voltmeter27. Some storage means, such as a sample-and-hold amplifier couldreplace the digital data system 27. As will be explained presently, byapplying a command signal to a command input terminal 28 of the digitaldata system 27 at a prescribed time, the average value of the parametricsignal appearing across resistor 17 will be measured by the digital datasystem 27.

To this end, the divider 20 is provided with paired outputs 29, 30, 31and 32. Divider output 29 is connected to fixed contacts 33a and 33b ofa switch 33 having a movable contact 330; divider output 30 is connectedto fixed contacts 34a and 34b of a switch 34 having a movable contact340; divider output 31 is connected to fixed contacts 35a and 35b of aswitch 35 having a movable contact 35c and divider output 32 isconnected to fixed contacts 36a and 36b of a switch 36 having a movablecontact 36c. The movable contacts 330, 34c, 35c and 360 are allconnected as inputs into an AND gate 37.

Each of the paired outputs 29 through 32 of the divider 20 is taken fromboth the negation and assertion outputs of flip-flops in a binarydivider chain such as a Texas Instrument Model 7493. Accordingly, whenvoltage is present at any of the fixed contacts of switches 33 through36, the other fixed contact will have zero voltage. Because the dividerhas four binary outputs and because the movable contacts 33 through 36each have two positions, the output of the AND gate 37 will be activatedon any one of 16 possible time segments which occur during any one cycleof the carrier wave. The particular segment selected during which therewill be an output from AND gate 37 is dependent upon the positions ofthe movable contacts 33c through 360. The output of AND gate 37 is fedthrough a varible delay circuit 38 and a fixed or aperture delay circuit39 to the command terminal 28 of the digital data system 27. The delaycircuits 38 and 39 may be monostable multivibrators such as commerciallyavailable Texas Instruments Model 74121.

The circuit is completed by a NAND gate 60 connected between divider 20and filter 21 and a diode 61 connected from the oscillator 19 output toan input of the AND gate 37. NAND gate 60 serves as a clipper of thesquare wave being supplied to filter 21. Diode 61 transmits a portion ofthe oscillator output to the input of gate 37 to prevent this gate fromdetecting phantom states which occur in divider 20 during its countingcycle.

Referring to FIG. 2, there is shown at 2a one cycle 40 of the carrierwave generated by oscillator 19 of FIG. 1, the cycle being divided, asshown, into 16 time segments each corresponding to 225 of the sinusoidalcarrier wave. The carrier signal attains its maximum positive peak valueat 41 which occurs at the end of time segment number 4 while the maximumnegative peak 42 occurs at the end of time segment number 12.

FIG. 2(b) illustrates one cycle of the modulated carrier wave 43 whichis the output of transducer 12 as it appears across resistor 17.waveshape 43 differs from the carrier 40 in that its magnitude variesfrom cycle to cycle in accordance with movement of core 14 and that itis of slightly shifted phase relationship to carrier 40 in that the peakpositive voltage 44 of waveshape 43 falls on vertical dashed line 45resulting in a phase shift as shown at 46.

With the switches 33 through 36 set as shown in FIG. 1, the AND gate 37will produce an output pulse 47 as shown in FIG. 2(c). This pulse has aleading edge corresponding to the end of time segment 4 and a trailingedge corresponding to the end of time segment and is fed to themonostable multivibrator 38.

As known to those skilled in the art, a monostable multivibratorproduces an output pulse whose leading edge corresponds to the inputtrigger signal and whose trailed edge may be advanced or retardedtimewise by adjustment of a potentiometer in a timing network of themultivibrator. Delay circuit 38 in the preferred embodiment of theinvention is such a multivibrator and produces an output pulse 48 whosetrailing edge may be varied as indicated by arrow 50. The trailing edgeof pulse 48 triggers the monostable multivibrator 39 which produces anoutput pulse 49.

The pulse 49 is of constant width and therefore delay circuit 39 neednot be adjustable. However, the timing components of delay circuit 39must be selected to that pulse 49 is about microseconds wide when theoutput frequency of oscillator 19 is 80 KHz as in the instant case wherethe transducer 12 is of a popular type requiring a 5 KHz stimulussignal. This is because pulse 49 is fed to the command input terminal 28of the digital voltmeter 27 and thus determines the voltmeter aperturetime, that is the period of time during which the voltmeter 27 will bemeasuring the output voltage of t ransd ucer12. Where the modulatedoutput 43 is being measured at its peak, as at 44 of FIG. 2(b), thepulse 49 may be relatively wide because the slope or rate of change ofwave 43 is very small on either side of maximum 44. Accordingly,although as shown in FIG. 2 the leading edge of pulse 49 and thetrailing edge 50 of pulse 48 fall on the dashed vertical line 45, thedelay circuit 38 should preferably be adjusted to center pulse 49 ondashed line 45. In practice this is achieved by adjusting circuit 38 toproduce a maximum reading on the digital voltmeter 27 when thetransducer 12 is stimulated by a static but nonzero input. Thus thedigital data system samples the peak value of the modulated carrier atof its sinusoidal variation and, due to the sealer 25 which reduces themagnitude of the modulated carrier applied to input terminal by a factorof 1.57, reads the average value of the modulated carrier. The digitaldata system may supply the average value to ancillary circuits such as,for example, circuits which control the parameters being measured by thetransducer 12.

The circuitry of the invention may also be used with a transducer whichproduces an output signal of constant amplitude but whose phaserelationship to the carrier input varies in accordance with the stimulusparameter applied to the transducer. Consider FIG. 3, in which the phaseof the transducer output signal 51 is shifted with respect to thecarrier 40 as a function of mechanical stimulus amplitude beingconstant. For the case shown in FIG. 3b, no parametric stimulus such asmotion or heat is applied to the transducer and a net output of zero isobtained as shown by 55 and 56 because the transducer shifts phaseexactly 90 as shown by peak 52 of the phase modulated wave 51 which lieson vertical dashed line 53 while peak 41 of the carrier wave 40 lies onvertical dashed line 54. In FIG. 4b, the stimulus has resulted in aphase shift less than 90 from the carrier wave 40. Performingrectification according to the rules and mathematics of the prior artdemodulator circuits yields a positive output 57 because the areas 55are greater than areas 56. If the output had shifted more than 90, anegative signal would have resulted at the demodulator output.

To demonstrate that synchronous sampling of the instant invention willdemodulate either an amplitude modulated carrier wave or a phasemodulated carrier wave, consider the waveforms of FIG. 2. It is obviousthat if the transducer output 43 were phase corrected (i.e., in phasewith the carrier) prior to rectification and filtering, and if it weresampled at exactly the correct time using a very narrow aperturesampling system, a value equal to the average voltage (V,,,,,,) of therectified and filtered signal could be obtained. For the amplitudemodulating type transducer, this optimum point 0.637 (V,,,,,,) is at39.5 (or 140.5) of the phasecorrected transducer output, since thissignal is closely sinusoidal in practice. This occurs because theaverage value of a single half cycle of a sinusoid is directly relatedto the peak value:

If is the angle at which V obtained for soid,

(b Arc sin 0.637 39.5 (or l40.5)

the input carrier wave.

Further, since the output is phase corrected to the carrier input, theaverage value of the output signal may be obtained by sampling it whenthe carrier signal passes through 39.5". Also, since phase correctionmerely refers to time correction of the transducer output, if the phaserelation to be corrected is constant, some alteration in the angularvalue of the sampling point will produce phase correction simultaneouswith sampling. No extra circuit would be required.

Because for a sinusoid the amplitude for any portion of the waveform canbe related to the peak amplitude merely by knowing the angularrelationship, sampling need not be performed at exactly 39.5 (or thephasecorrected equivalent). By sampling the signal near its peak, at 90,where the rates of change are not as drastie the value obtained may thenbe scaled down by the fixed ratio 2/1r to obtain the correct value.

Consider the waveforms of FIGS. 3 and 4, relating to the phase shiftingtype transducer. Again, as in the case of the amplitude modulatingtransducer, sampling could be accomplished as the signal passes throughits average value, but the angular or phase relationship here isdifferent from that previously discussed with re gard to amplitudemodulated carriers. If it is assumed that sampling occurs at the peak 41of the carrier input signal 40 (d =vr/2 radians), the correct samplingpoint is obtained for that of no input stimulus as shown at 48 in FIG.3(b), where the value of 51 is zero. Consider FIG. 4(b), for the casewhere the phase shift is any value, Assuming sampling still occurs atqb=4r/2 radians which falls on vertical dashed line 54 the amplitudeseen on the output signal is out (s n 90+6) =K (sin 90 cos 0+cos 90 sin0)=K cos 0 The constant factor K will be evaluated subsequently. Next,the manner in which an analog demodulator would operate on the rectifiedtransducer output of FIG. 4(b) would be to average it over a half-cycleof If 6=0, the phase shifting type transducer output is in phase withthe input, and

ary 2 nm /7T K, where K is the constant of equation (3). 7

Thus, since the average voltage is always equal to the sampled voltage,if the sample is taken at 90 of the carrier input and scaled by thefactor 2/1r synchronous sampling at this point will produce the desiredresults. In summary, for either the amplitude modulating type or phaseshifting type transducer (and consequently for any type linearcombination of the two types) synchronous sampling at degrees of thecarrier input waveform, with subsequent scaling by a factor 2/11-produces exactly the same output signal as conventional demodulation byrectification and filtering.

ALTERNATE EMBODIMENTS OF THE INVENTION The circuit shown in FIG. Iminimizes the number of required binary stages in the divider 20 bymeasuring the modulated carrier at its 90 value and then scaling thisdown by a factor of 1157 to obtain the average value. It may be shownmathematically that a sine wave passes through its average value, thatis 0.637 times its peak value, at 39.5", l40.5, 2l9.5 and 320.5. Thus bysampling the modulated carrier at, for example, 395 of its phase angle,the average value would be obtained. However, to sample at the 39.5angle requires that each cycle of the carrier be divided into 128segments of 2.8 each, and the fifteenth segment sampled.

Accordingly, an alternate embodiment which would measure the modulatedcarrier at 395 may include an oscillator 19 having an output frequencyof 640 KHz and a divider 20 having seven binary stages so that theoscillator frequency is divided by a factor of 128 to provide a 5 KHzsquare wave to filter 21. The divider would provide seven binary outputsconnected to the AND gate 37. Other circuitry would remain the sameexcept for the elimination of scaler 25 which is no longer requiredinasmuch as the modulated carrier is being measured at its average valuerather than at its peak value.

It will be understood that the foregoing circuitry may be changed ormodified by those skilled in the art to which the invention pertainswithout departing from the spirit and scope of the invention as setforth in the claims appended hereto.

What is claimed is:

1. Circuitry for demodulating a transducermodulated carrier waverepresentative of a parameter being measured comprising:

a carrier type transducer having input means and output means;

sinusoidal generating means connected to said trans ducer input meansfor applying a sinusoidal carrier signal thereto,

said sinusoidal generating means comprising:

an oscillator, a frequency divider having input means and output meansand a plurality of divider stages, each stage having a binary output,means for connecting said oscillator to said input means of saidfrequency divider, sinusoidal filter means, amplifier means having inputmeans and output means, means for connecting said filter means betweensaid output means of said frequency divider and said input means of saidamplifier and means for connecting said output means of said amplifierto said input means of said transducer;

a digital data system having an input connected to said transduceroutput means to receive a modulated carrier wave therefrom; and

means for commanding said digital data system to measure the magnitudeof the modulated carrier signal at a prescribed time of each cycle ofthe modulated carrier signal,

said means for commanding comprising an AND gate having output means anda plurality of input means, means for connecting said binary outputs ofsaid divider to respective ones of said plurality of input means of saidAND gate, and means for connecting said output means of said AND gate toa command signal input of said digital data system through a variabledelay means and fixed delay I means.

2. The circuit of claim 1 wherein said means for connecting said binaryoutputs to said inputs of said AND gate comprises a plurality ofswitches or jumpers each having a pair of fixed contacts connected to arespective binary outputs of said divider and a movable contactconnected to a respective one of said plurality of said input means ofsaid AND gate.

3. The circuit of claim 1 wherein said divider includes four binaryoutputs and said oscillator provides an output carrier having afrequency of 80 KHZ.

4. The circuitry of claim 1 wherein said transducer is of the amplitudemodulating type and wherein said prescribed time of each cycle is 395.

5. The circuit of claim 1 and further including scaler means connectedbetween said output means of said digital data system to reduce by apredetermined amount the magnitude of the modulated carrier beingapplied to said digital data system.

6. The circuit of claim 1 and further including control means responsiveto said digital data system for adjusting the parameter being measuredby said transducer.

7. A method ofdemodulating a carrier wave comprising the steps of:

generating a first voltage waveshape of predetermined frequency;

dividing the first voltage waveshape to produce a plurality of squarewaves of different frequencies each of which is a submultiple of thefirst voltage waveshape;

filtering the lowest frequency one of said square waves to produce asinusoidal waveshape; modulating said sinusoidal waveshape in accordancewith a parameter being measured; combining said square waves to producea square pulse which occurs at a predetermined time during each cyclicalternation of the sinusoidal wave;

varying the trailing edge of said square pulse timewise until itcoincides with a predetermined phase angle of said sinusoidal wave;

supplying said modulated sinusoidal wave to a commandable indicator; and

measuring said modulated sinusoidal voltage at each occurrence of thetrailing edge of said square pulse.

8. The method of claim 7 wherein said phase angle of said sinusoidalwave is 395.

9. The method of claim.7 wherein said phase angle of said sinusoidalwave is and including the additional step of scaling down said modulatedsinusoidal wave by a factor of 2/1r before said modulated sinusoidalwave is measured.

1. Circuitry for demodulating a transducer-modulated carrier waverepresentative of a parameter being measured comprising: a carrier typetransducer having input means and output means; sinusoidal generatingmeans connected to said transducer input means for applying a sinusoiDalcarrier signal thereto, said sinusoidal generating means comprising: anoscillator, a frequency divider having input means and output means anda plurality of divider stages, each stage having a binary output, meansfor connecting said oscillator to said input means of said frequencydivider, sinusoidal filter means, amplifier means having input means andoutput means, means for connecting said filter means between said outputmeans of said frequency divider and said input means of said amplifierand means for connecting said output means of said amplifier to saidinput means of said transducer; a digital data system having an inputconnected to said transducer output means to receive a modulated carrierwave therefrom; and means for commanding said digital data system tomeasure the magnitude of the modulated carrier signal at a prescribedtime of each cycle of the modulated carrier signal, said means forcommanding comprising an AND gate having output means and a plurality ofinput means, means for connecting said binary outputs of said divider torespective ones of said plurality of input means of said AND gate, andmeans for connecting said output means of said AND gate to a commandsignal input of said digital data system through a variable delay meansand fixed delay means.
 2. The circuit of claim 1 wherein said means forconnecting said binary outputs to said inputs of said AND gate comprisesa plurality of switches or jumpers each having a pair of fixed contactsconnected to a respective binary outputs of said divider and a movablecontact connected to a respective one of said plurality of said inputmeans of said AND gate.
 3. The circuit of claim 1 wherein said dividerincludes four binary outputs and said oscillator provides an outputcarrier having a frequency of 80 KHz.
 4. The circuitry of claim 1wherein said transducer is of the amplitude modulating type and whereinsaid prescribed time of each cycle is 39.5* .
 5. The circuit of claim 1and further including scaler means connected between said output meansof said digital data system to reduce by a predetermined amount themagnitude of the modulated carrier being applied to said digital datasystem.
 6. The circuit of claim 1 and further including control meansresponsive to said digital data system for adjusting the parameter beingmeasured by said transducer.
 7. A method of demodulating a carrier wavecomprising the steps of: generating a first voltage waveshape ofpredetermined frequency; dividing the first voltage waveshape to producea plurality of square waves of different frequencies each of which is asubmultiple of the first voltage waveshape; filtering the lowestfrequency one of said square waves to produce a sinusoidal waveshape;modulating said sinusoidal waveshape in accordance with a parameterbeing measured; combining said square waves to produce a square pulsewhich occurs at a predetermined time during each cyclic alternation ofthe sinusoidal wave; varying the trailing edge of said square pulsetime-wise until it coincides with a predetermined phase angle of saidsinusoidal wave; supplying said modulated sinusoidal wave to acommandable indicator; and measuring said modulated sinusoidal voltageat each occurrence of the trailing edge of said square pulse.
 8. Themethod of claim 7 wherein said phase angle of said sinusoidal wave is39.5* .
 9. The method of claim 7 wherein said phase angle of saidsinusoidal wave is 90* and including the additional step of scaling downsaid modulated sinusoidal wave by a factor of 2/ pi before saidmodulated sinusoidal wave is measured.